From: Christine Gharzuzi Date: Wed, 25 Jul 2018 13:06:10 +0000 (+0300) Subject: fix: a3900: pm: fix number of CPU power switches. X-Git-Url: http://git.openwrt.org/%22https:/collectd.org//%22/%22https:/collectd.org/%22?a=commitdiff_plain;h=5cf6fafe223da89c60e2323c242ea188b17e98c3;p=project%2Fbcm63xx%2Fatf.git fix: a3900: pm: fix number of CPU power switches. - Number of open power switches for CPUs should be three and now two. - This patch updates the value of open power switches from 0xfd (two power-switches) to 0xfc (three power-switches). Change-Id: I2783ab7f04bbbb6da78eeedcabe4636f9a774512 Signed-off-by: Christine Gharzuzi Reviewed-by: Kostya Porotchkin --- diff --git a/plat/marvell/a8k/common/plat_pm.c b/plat/marvell/a8k/common/plat_pm.c index 1b68d076..28544169 100644 --- a/plat/marvell/a8k/common/plat_pm.c +++ b/plat/marvell/a8k/common/plat_pm.c @@ -79,7 +79,7 @@ enum CPU_ID { #define PWRC_CPUN_CR_PWR_DN_RQ_OFFSET 1 #define PWRC_CPUN_CR_LDO_BYPASS_RDY_OFFSET 0 #else -#define PWRC_CPUN_CR_PWR_DN_RQ_OFFSET 0 + #define PWRC_CPUN_CR_PWR_DN_RQ_OFFSET 0 #define PWRC_CPUN_CR_LDO_BYPASS_RDY_OFFSET 31 #endif @@ -106,7 +106,7 @@ enum CPU_ID { #define AP807_PWRC_LDO_CR0_OFFSET 16 #define AP807_PWRC_LDO_CR0_MASK \ (0xff << AP807_PWRC_LDO_CR0_OFFSET) -#define AP807_PWRC_LDO_CR0_VAL 0xfd +#define AP807_PWRC_LDO_CR0_VAL 0xfc /* * Power down CPU: